As part of today’s AMD’s 2022 Financial Analyst Day, the company is offering a short, high-level update on their forthcoming Zen 4 CPU architecture. This information is being divulged as part of the company’s larger Zen architecture roadmap, which today is being extended to announce Zen 5 for 2024.

The biggest news here is that AMD is, for the first time, disclosing their IPC expectations for the new architecture. Addressing some post-Computex questions around IPC expectations, AMD is revealing that they expect Zen 4 to offer an 8-10% IPC uplift over Zen 3. The initial Computex announcement and demo seemed to imply that most of AMD’s performance gains were from clockspeed improvements, so AMD is working to respond to that without showing too much of their hand months out from the product launches.

This makes up a good chunk of AMD’s overall >15% expected improvement in single-threaded performance, which was previously disclosed at Computex and essentially remains unchanged. That said, AMD is strongly emphasizing the “greater than” aspect of that performance estimate. At this point AMD can’t get overly specific since they haven’t locked down final clockspeeds, but as we’ve seen with their Computex demos, peak clockspeeds of 5.5GHz (or more) are currently on the table for Zen 4.

AMD is also talking a bit more about power and efficiency expectations today. At this point, AMD is projecting a >25% increase in performance-per-watt with Zen 4 over Zen 3 (based on desktop 16C chips running CineBench). Meanwhile the overall performance improvement stands at >35%, no doubt taking advantage of both the greater performance of the architecture per-thread, and AMD’s previously disclosed higher TDPs (which are especially handy for uncorking more performance in MT workloads). And yes, these are terrible graphs.

Finally, AMD is confirming that there will be V-Cache equipped Zen 4 SKUs within their processor lineup. No specific SKUs are being announced today, but AMD is reiterating that V-Cache was not just a one-off experiment for the company, and that they will be employing the die stacked L3 cache on some Zen 4 chips as well.

POST A COMMENT

10 Comments

View All Comments

  • TallestJon96 - Thursday, June 9, 2022 - link

    An 8+ core Zen 4 3D cache chip with DDR5 could be a perfect upgrade from my i9-9900k for gaming. Very much looking forward to Zen 4 vs 13th Gen Reply
  • thestryker - Thursday, June 9, 2022 - link

    With Zen 5 being announced as a 2024 part I would be surprised if we saw v-cache processors going up against RPL. Seems more likely that they'd hold onto them as part of their 2023 product range to go against MTL. Not that your current system won't easily be fine until then as well.

    The current CPU situation is definitely the best we've seen in well over a decade and I hope both companies keep executing.
    Reply
  • Bik - Friday, June 10, 2022 - link

    exciting times indeed Reply
  • Kevin G - Thursday, June 9, 2022 - link

    I think this strongly hints at the difference between Zen 4 and Zen 4c: AVX-512 support. Rather both designs will support the same ISA as AMD has disclosed earlier. Rather the full Zen 4 will feature a 512 bit width AVX execution engine where as Zen 4C will tackle AVX-512 instructions using 256 bit wide half width chunks. This is similar to how Zen 1 tackled AVX2 using two 128 bit chunks. Reply
  • mode_13h - Saturday, June 11, 2022 - link

    > Zen 4C will tackle AVX-512 instructions using 256 bit wide half width chunks.

    From what I've heard, certain AVX-512 instructions defy this approach. I don't know more specifics, like if those instructions can just be handled in a special-case fashion, or if they'd really force the entire AVX-512 pipeline to be implemented at full-width.

    However, there are other parameters that can be varied to reduce implementation & power footprint, such as the latency of certain instructions.

    BTW, I've heard that Zen 3 implements 4x AVX2 pipelines. They might not be symmetrical, with one pair supporting different instructions than the other. However, if true, then that suggests even implementing a single, full-width AVX-512 pipeline probably isn't a stretch for Zen 4c.

    Also, let's not forget that Intel packed dual- AVX-512 FMAs into their 14 nm server cores. So, integrating just a single pipeline @ 5 nm probably won't come anywhere close to stretching Zen 4c's transistor budget.
    Reply
  • Samus - Wednesday, June 22, 2022 - link

    I think it's just bragging rights against Intel, who has seemingly abandoned AVX512.

    Linus Torvalds can be quoted going back at least a decade how ridiculous Intel has gotten with many ISA extensions that have little real world purpose, existing to pad certain benchmarks, and it really took off with AVX, though even MMX was kind of useless (SSE offered much more FPU support)

    On the other hand, I think many Intel extensions have been incredibly impactful, especially QuickSync, making AMD CPU's irrelevant for heavy video encoding tasks from DVR's to general purpose rendering where production quality isn't important. And they need it because dollar for dollar, Zen had been trumping Intel for years before Adler in encoding performance in non-QuickSync applications.
    Reply
  • mode_13h - Thursday, June 23, 2022 - link

    > Linus Torvalds can be quoted going back at least a decade how ridiculous
    > Intel has gotten with many ISA extensions that have little real world purpose

    I'm not really defending AVX-512. I think it was probably a step too far (and certainly too soon). Though ARM's approach with SVE makes much more sense to me.

    > even MMX was kind of useless

    Not at all. I wrote tons of MMX code. It was great for image processing, but the need to flush the FPU state before switching back to x87 instructions really sucked.

    > SSE offered much more FPU support

    SSE was really a great leap forward, not least because it addressed lots of deficiencies in the x87 ISA. SSE2 effectively replaced MMX + added double-precision support. Again, a true advancement.

    For the lack of any direct experience with AVX/AVX2, I won't comment further on it.

    > I think many Intel extensions have been incredibly impactful, especially QuickSync

    That's just a marketing name for what's basically a hardware block in the iGPU. Doesn't really belong in the same discussion.
    Reply
  • IBM760XL - Saturday, June 11, 2022 - link

    Good to hear about 8-10% IPC and 25% performance-per-watt. That's enough to tip the scale in favor of AM5 over AM4 (unless, of course, my old computer kicks the bucket too soon).

    I do hope there's an option for a 25% performance-per-watt with equal-or-lower power draw. It's probably possible with software or motherboard tweaking, but I'm a bit out of practice with what the best options for those are on chips newer than Core 2, especially on the AMD side.
    Reply
  • mode_13h - Saturday, June 11, 2022 - link

    One option is simply to buy a CPU based on your power budget. For instance, I'm eyeing the 5700X, which is an 8-core Zen 3 CPU @ 65 W. It has nearly the same single-thread performance as the 105 W 5800X, and about 82% - 92% of the all-core performance on CPU-intensive benchmarks (with the mean somewhere around 88%). And that's at just 62% of the peak power. Reply

Log in

Don't have an account? Sign up now