Today, Apple has unveiled their brand-new MacBook line-up. This isn’t an ordinary release – if anything, the move that Apple is making today is something that hasn’t happened in 15 years: The start of a CPU architecture transition across their whole consumer Mac line-up.

Thanks to the company’s vertical integration across hardware and software, this is a monumental change that nobody but Apple can so swiftly usher in. The last time Apple ventured into such an undertaking in 2006, the company had ditched IBM’s PowerPC ISA and processors in favor of Intel x86 designs. Today, Intel is being ditched in favor of the company’s own in-house processors and CPU microarchitectures, built upon the Arm ISA.

The new processor is called the Apple M1, the company’s first SoC designed with Macs in mind. With four large performance cores, four efficiency cores, and an 8-GPU core GPU, it features 16 billion transistors on a 5nm process node. Apple’s is starting a new SoC naming scheme for this new family of processors, but at least on paper it looks a lot like an A14X.

Today’s event contained a ton of new official announcements, but also was lacking (in typical Apple fashion) in detail. Today, we’re going to be dissecting the new Apple M1 news, as well as doing a microarchitectural deep dive based on the already-released Apple A14 SoC.

The Apple M1 SoC: An A14X for Macs

The new Apple M1 is really the start of a new major journey for Apple. During Apple’s presentation the company didn’t really divulge much in the way of details for the design, however there was one slide that told us a lot about the chip’s packaging and architecture:

This packaging style with DRAM embedded within the organic packaging isn't new for Apple; they've been using it since the A12. However it's something that's only sparingly used. When it comes to higher-end chips, Apple likes to use this kind of packaging instead of your usual smartphone POP (package on package) because these chips are designed with higher TDPs in mind. So keeping the DRAM off to the side of the compute die rather than on top of it helps to ensure that these chips can still be efficiently cooled.

What this also means is that we’re almost certainly looking at a 128-bit DRAM bus on the new chip, much like that of previous generation A-X chips.

On the very same slide, Apple also seems to have used an actual die shot of the new M1 chip. It perfectly matches Apple’s described characteristics of the chip, and it looks looks like a real photograph of the die. Cue what's probably the quickest die annotation I’ve ever made:

We can see the M1’s four Firestorm high-performance CPU cores on the left side. Notice the large amount of cache – the 12MB cache was one of the surprise reveals of the event, as the A14 still only featured 8MB of L2 cache. The new cache here looks to be portioned into 3 larger blocks, which makes sense given Apple’s transition from 8MB to 12MB for this new configuration, it is after all now being used by 4 cores instead of 2.

Meanwhile the 4 Icestorm efficiency cores are found near the center of the SoC, above which we find the SoC’s system level cache, which is shared across all IP blocks.

Finally, the 8-core GPU takes up a significant amount of die space and is found in the upper part of this die shot.

What’s most interesting about the M1 here is how it compares to other CPU designs by Intel and AMD. All the aforementioned blocks still only cover up part of the whole die, with a significant amount of auxiliary IP. Apple made mention that the M1 is a true SoC, including the functionality of what previously was several discrete chips inside of Mac laptops, such as I/O controllers and Apple's SSD and security controllers.

The new CPU core is what Apple claims to be the world’s fastest. This is going to be a centre-point of today’s article as we dive deeper into the microarchitecture of the Firestorm cores, as well look at the performance figures of the very similar Apple A14 SoC.

With its additional cache, we expect the Firestorm cores used in the M1 to be even faster than what we’re going to be dissecting today with the A14, so Apple’s claim of having the fastest CPU core in the world seems extremely plausible.

The whole SoC features a massive 16 billion transistors, which is 35% more than the A14 inside of the newest iPhones. If Apple was able to keep the transistor density between the two chips similar, we should expect a die size of around 120mm². This would be considerably smaller than past generation of Intel chips inside of Apple's MacBooks.

Road To Arm: Second Verse, Same As The First

Section by Ryan Smith

The fact that Apple can even pull off a major architectural transition so seamlessly is a small miracle, and one that Apple has quite a bit of experience in accomplishing. After all, this is not Apple’s first-time switching CPU architectures for their Mac computers.

The long-time PowerPC company came to a crossroads around the middle of the 2000s when the Apple-IBM-Motorola (AIM) alliance, responsible for PowerPC development, increasingly struggled with further chip development. IBM’s PowerPC 970 (G5) chip put up respectable performance numbers in desktops, but its power consumption was significant. This left the chip non-viable for use in the growing laptop segment, where Apple was still using Motorola’s PowerPC 7400 series (G4) chips, which did have better power consumption, but not the performance needed to rival what Intel would eventually achieve with its Core series of processors.

And thus, Apple played a card that they held in reserve: Project Marklar. Leveraging the flexibility of the Mac OS X and its underlying Darwin kernel, which like other Unixes is designed to be portable, Apple had been maintaining an x86 version of Mac OS X. Though largely considered to initially have been an exercise in good coding practices – making sure Apple was writing OS code that wasn’t unnecessarily bound to PowerPC and its big-endian memory model – Marklar became Apple’s exit strategy from a stagnating PowerPC ecosystem. The company would switch to x86 processors – specifically, Intel’s x86 processors – upending its software ecosystem, but also opening the door to much better performance and new customer opportunities.

The switch to x86 was by all metrics a big win for Apple. Intel’s processors delivered better performance-per-watt than the PowerPC processors that Apple left behind, and especially once Intel launched the Core 2 (Conroe) series of processors in late 2006, Intel firmly established itself as the dominant force for PC processors. This ultimately setup Apple’s trajectory over the coming years, allowing them to become a laptop-focused company with proto-ultrabooks (MacBook Air) and their incredibly popular MacBook Pros. Similarly, x86 brought with it Windows compatibility, introducing the ability to directly boot Windows, or alternatively run it in a very low overhead virtual machine.

The cost of this transition, however, came on the software side of matters. Developers would need to start using Apple’s newest toolchains to produce universal binaries that could work on PPC and x86 Macs – and not all of Apple’s previous APIs would make the jump to x86. Developers of course made the jump, but it was a transition without a true precedent.

Bridging the gap, at least for a bit, was Rosetta, Apple’s PowerPC translation layer for x86. Rosetta would allow most PPC Mac OS X applications to run on the x86 Macs, and though performance was a bit hit-and-miss (PPC on x86 isn’t the easiest thing), the higher performance of the Intel CPUs helped to carry things for most non-intensive applications. Ultimately Rosetta was a band-aid for Apple, and one Apple ripped off relatively quickly; Apple already dropped Rosetta by the time of Mac OS X 10.7 (Lion) in 2011. So even with Rosetta, Apple made it clear to developers that they expected them to update their applications for x86 if they wanted to keeping selling them and to keep users happy.

Ultimately, the PowerPC to x86 transitions set the tone for the modern, agile Apple. Since then, Apple has created a whole development philosophy around going fast and changing things as they see fit, with only limited regard to backwards compatibility. This has given users and developers few options but to enjoy the ride and keep up with Apple’s development trends. But it has also given Apple the ability to introduce new technologies early, and if necessary, break old applications so that new features aren’t held back by backwards compatibility woes.

All of this has happened before, and it will all happen again starting next week, when Apple launches their first Apple M1-based Macs. Universal binaries are back, Rosetta is back, and Apple’s push to developers to get their applications up and running on Arm is in full force. The PPC to x86 transition created the template for Apple for an ISA change, and following that successful transition, they are going to do it all over again over the next few years as Apple becomes their own chip supplier.

A Microarchitectural Deep Dive & Benchmarks

In the following page we’ll be investigating the A14’s Firestorm cores which will be used in the M1 as well, and also do some extensive benchmarking on the iPhone chip, setting the stage as the minimum of what to expect from the M1:

Apple's Humongous CPU Microarchitecture
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  • rtharston - Thursday, November 12, 2020 - link

    These benchmarks are all CPU only (with some memory bandwidth too, since the CPU can't do anything without memory...). All these figures are CPU only. Yes, Apple managed to make a CPU that is as fast or faster than Intel and AMD. Just read the article and you'll see how. They have more ALUs. They have more registers (thanks to ARM64). They have larger (and faster) caches across the board. All that adds up to a higher performance CPU.

    You are right about the dedicated silicon being better at other things though, so now imagine how much more performance Apple's devices will have when using these fast CPUs *and* the dedicated silicon to do other things.
  • daveedvdv - Thursday, November 12, 2020 - link

    > My opinion is that using dedicated silicon for a specific task and not generic CPU computing is where almost ALL of the improved performance comes from.

    No. Neither SPEC nor GeekBench would take advantage of that.

    Furthermore, the applications that Apple uses to boast about the CPU (not GPU) performance are thing like Clang, Ninja, and CMake, which wouldn't benefit from that either.
  • millfi - Wednesday, June 23, 2021 - link

    Dedicated silicon is very fast and efficient when run specific Tasks with a high degree of parallelism, such as ML. But this cannot explain that M1 chips high IPC recorded in spec int. Because this benchmark runs general tasks which are written general CPU Instructions. If Apple could offload such a task to a dedicated circuit, that would be magic.
  • melgross - Wednesday, November 11, 2020 - link

    The M1 isn’t that much of an advance.
  • BlackHat - Tuesday, November 10, 2020 - link

    Guys, the main reason why I loved your website is because you dig in marketing footnotes, I don't know if you already read it (Aparrently no) but they are out and Apple claims that "the most powerful chip or the most power-efficient" is against their own 2018 MacBook, an 14nm i7 SkyLake with LPDDR3, no even against their last Ice Lake model, let alone Renoir (yes I know Apple doesn't have ryzen products) I don't know know if I missing something but I think that you ARM destroying x86 isn't going too far? Yes is power efficiency but it is that big difference to ignore all the performance lost?
  • BlackHat - Tuesday, November 10, 2020 - link

    And the single core claims are based in single core peak performance in "leadership industry benchmarks" whatever that means and an combination of JavaScript test and Speedometer (this last one I heard from you that was close to Apple) so, anyways we will wait for bench.
  • Kilnk - Tuesday, November 10, 2020 - link

    These are the benchmarks they are talking about.
    Single core is faster than anything else in the consumer market. Yes. ANYTHING else.
    Multicore lands just above the 9700KF.
  • BlackHat - Tuesday, November 10, 2020 - link

    The think why people don't thrust Geekbench is because even they confirmed that old Geekbench benchmarks (basically 4 and older) were inaccurate due its dependency of bigger caches, meaning that CPU with bigger caches could beat other CPUs in short workloads (something that Geekbench those) but I can be wrong.
  • name99 - Tuesday, November 10, 2020 - link

    You mean Apple "cheat" by adding to their CPUs the pieces that make CPU's run faster, like a larger cache?
    OMG, say it isn't so!

    The pretzels people twist themselves into when they don't want to face reality...

    Just as a guide to the future, look to what really impresses those "skilled in the art" about this CPU. It's explicitly NOT the cache sizes; those are nice but even more impressive are the LSQ sizes, the MLP numbers (not covered here but in an earlier AnandTech piece) and the spec numbers for mcf and omnetpp.
    Understand what those numbers mean and why they are impressive and you'll be competent to judge future CPUs.
  • BlackHat - Tuesday, November 10, 2020 - link

    Talking about twist and you twist my comment, what Geekbench maker themselves said is due their bechmarks being of short run, CPUs with big caches show a big margin (no matter if Apple or other maker, in fact, they show how Samsung Exynos mongoose took advantage of this), for long workload the benchmark was useless.

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