PCI-SIG has released version 0.5 of the PCIe 6.0 specification to its members this week. The new, "first draft" version of the spec includes the feedback the group got from its members after publication of version 0.3 back in October. With their latest update, PCI-SIG remains confident that it is on track to finalize the PCIe 6.0 standard in 2021.

It took PCI-SIG long seven years to complete the PCIe 4.0 specification, a long slog that the group has committed to avoiding going forward for PCIe 5.0 and beyond. With PCIe 6.0, PCI-SIG is keeping up that rapid pace of development, releasing the first draft version of the spec less than a year after formal announcement of the spec.

Overall, PCI-SIG has five key steps in creating a PCIe specification:

  • Version 0.3 is beheld as a Concept and outlines the key features and architecture of the technology. In case of PCIe 6.0, we are talking about 64 GT/s per lane speed, pulse amplitude modulation with 4 levels (PAM-4) encoding, and forward error correction (FEC).
  • Version 0.5 is considered as the First Draft specification and so it covers all the key aspects of the architecture and includes feedback from interested parties (within PCI-SIG) to version 0.3. Members of the group will be able to add new functionality to the technology at this point.
  • Version 0.7 is deemed to be the Complete Draft, everything has to be defined at all levels and electrical specifications must have been validated via test chips. No new features may be added after release of this iteration of the specification.
  • Version 0.9 is the Final Draft that is meant to allow PCI-SIG members to review the technology for their intellectual property.
  • Version 1.0 is the Final Release.

The publication of version 0.5 of the PCIe 6.0 specification is essentially the final call for submissions of the new features by PCI-SIG member companies. Furthermore, with the first draft available, companies can start designing test silicon to ensure that everything works and even begin preliminary work on commercial chips.

The next milestone for the PCIe 6.0 specification will be the upcoming PCI-SIG Developers Conference 2020 in early June, where the group plans to present deep dives into the features of the technology.

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Source: PCI-SIG

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  • Ej24 - Friday, February 21, 2020 - link

    The specification has to be established and published before hardware oems can even hope to design controllers and then final AICs to make use of the interface. It's normal for the spec to be published a few years before you see products. The pci spec isn't intended for consumers, it's to guide hardware designers and engineers. Reply
  • techguymaxc - Friday, February 21, 2020 - link

    I'm well aware of the certification process for revisions to the PCI-e protocol. My argument is that the certification body dropped the ball after PCI-e 3.0 and we're now paying the price. Reply
  • mode_13h - Friday, February 21, 2020 - link

    How are you paying the price? Reply
  • mode_13h - Friday, February 21, 2020 - link

    A number of ARM servers also have PCIe 4.0, and POWER had it since like 2018. Reply
  • damianrobertjones - Friday, February 21, 2020 - link

    Suggestion to everyone: Do not buy a new motherboard, or computer, with pcie4 until 2021.

    I bet we'd have pci e 6 by the end of THIS year.

    It IS all about milking the max amount of cash over the longest period of time. Tech could be so very far ahead if it wasn't for $$$$
    Reply
  • Brane2 - Friday, February 21, 2020 - link

    Nope. Newset gfenerations are aimed at most advanced, cutingh edge silicon.
    So afte rthe standard comes out, you see only a few cutting edge components for supercomputers.
    Then, after some time you get to see components for datacenters etc.

    Then, after some time you get to see first, most advanced server boards and THEN they start to trickle into most expensive consumer products.

    So, if you plan to wait for PCIe v6, you'll wait for quite some time.

    Ordinary tech has problems even with PCIe4 ( like cooler on AMD's chipset etc), what would you do with 4x faster ( ond presumably at least 4x more power hungry) PCIe6 ?

    Would you be fine with your chipset churning EXTRA 60W with nothing to show for it ?
    Reply
  • chophshiy - Friday, February 21, 2020 - link

    Generally, for PCIe, it gets deployed top to bottom when it's available. It's the proprietary stuff (NVLINK) the starts at the top and /sometimes/ trickles down. More often than not, the proprietary stuff dies off as it gets replaced by standardized alternatives. Reply
  • mode_13h - Friday, February 21, 2020 - link

    This sort of tech is where trends fail to extrapolate. PCIe 5.0 and 6.0 are so power-hungry and expensive to implement, and these aren't problems that can necessarily be solved by normal technological advances like smaller process nodes. Reply
  • aadish151 - Friday, February 21, 2020 - link

    How can you even expect PCI 6.0 hardware before the spec is released? Spec will be released in 2021. It will probably take 2-3 yrs after that to see PCI 6.0 products in consumer space. We don't even have PCI 5.0 products yet. Reply
  • mode_13h - Friday, February 21, 2020 - link

    You'll die of old age, waiting for a desktop board with PCIe 6.0. Reply

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