When new flagship silicon chips are released, one thing that I always eagerly await is somebody publishing a die shot of said design. Over the past few years this has always been done by ChipWorks and subsequently TechInsights – but last year a little known site called ChipRebel caught my attention when they released a very high quality, high-resolution shot of the Apple A11. I’ve been in touch with the folks over there over the past few weeks, poking to see what their plans were, and was happy to hear that they’re trying to gain more traction in the future.

Yesterday ChipRebel released a preliminary teardown of the new Huawei Mate 20 – and along with it publicly released a low-res version of their Kirin 980 die shot, along with their commercial high-resolution shot. This is very exciting, as the new HiSilicon chip marks the second commercially available consumer 7nm chip – of course after Apple’s own A12 from just a few weeks prior. More importantly, this is the first time we’re seeing Arm’s new Cortex A76 CPUs as well as the new Mali G76 GPU.

I took the liberty to label some of the some more obvious block complexes of the SoC image on my own, and also shared this with the folks over at ChipRebel:

Die shot credit: ChipRebel - Block labelling: AnandTech

Second commercial 7nm SoC - Another tiny die!

First of all – the Kirin 980 is quite a lot smaller than HiSilicon had led to people to believe:  Back when the chipset was announced, they had mentioned it was “under 100mm²”, with many thinking the die would be somewhere in the ballpark just below that figure. In reality, the Kirin 980 measures just a mere 74.13mm² - a 30% reduction compared to last year’s 96.72mm² Kirin 970 – even though the new chipset brings a lot of new features and more complexity.

On the top left corner we can see the new Mali G76MP10 GPU. The Mali G76 drastically differs from past generation Arm GPUs in that it essentially doubles the computational capabilities of each core – in effect that one could say that the new MP10 core configuration in the Kirin 980 is about equivalent to a MP20 of the previous generation – microarchitectural improvements aside.

On the right side we see the new CPU complex. This is HiSilicon’s first DynamIQ CPU configuration, as the company’s release schedule for the Kirin 970 last year made them miss out on the Cortex A75. For the Kirin 980 however, we see a configuration that fully takes advantage of the new DynamIQ flexibility: We have essentially one large CPU cluster, with different CPUs attached to it.

The centre complex is the DSU, the DynamIQ Shared Unit, essentially the L3 cache controller along with the tag RAMs as well as the large 4MB L3 cache itself. Flanked on both sides of the DSU we see the 4 Cortex A55 cores that clock up to 1.8GHz, each of these also sport private 128KB L2 caches.

Really nice to see on the die shot is the two pairs of Cortex A76 cores. HiSilicon employs the four cores into pairs, with each pair running on a dedicated voltage and frequency plane. We can see that the physical implementation between the two pairs very evidently differs, and this would confirm my suspicion that we’re looking at a frequency optimised pair, running at up to 2.6GHz, and a more power optimised pair, limited to 1.92GHz. Both pairs employ 512KB private L2 caches on each core.

An interesting thing is that it’s again extremely difficult to even locate the NPU on even the Kirin 980. HiSilicon describes this as a dual-core unit, however I can’t seem to find any matching block on the shot – if the company is using non-identical layouts for the two “cores”, then all bets are off in trying to identify this easily.

Overall, it’s great to have a new player in the die shot imaging scene, and hopefully the folks over at ChipRebel are able to gain more attention in order to be able to continue to share with us images of important future chip developments.

I’m finishing up my review of the Mate 20 and Mate 20 Pro – and we’ll go into more detail into the performance and power of the new Kirin 980 and the new Cortex A76 CPUs as well as the new Mali G76, so stay tuned!

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  • Wilco1 - Sunday, November 11, 2018 - link

    You can only compare with the first time Cortex-A72 was available in high-end phones, ie. only 3 years ago. Using the A72 announcement is lying especially if you use it to claim phone SoC performance hasn't increased dramatically. Can you understand that?
  • ZolaIII - Sunday, November 11, 2018 - link

    It whosent only announced, the IP whose ready for licensing. It took almost two years to see the first implementation in phone's. ARM worked a lot with founderis in the mean time & developed POP IP's of newer core's shortening the time to silicone to eith - nine months now. We are seeing the first A76 on silicone in less than six months from time ARM announced it publicly meaning it whose announced at last six months before that to crucial partners & IP's are probably available for 10~11 months. The performance in general use only got a minor bump, primarily working core's are still small in order one's. A55 is only about 12% faster than A53 when you add into the mix and transition from planar to FinFET for midrange segment with 15~20% clock bump you end up with 25~30% combined in those 3+ years.
  • NICOXIS - Thursday, November 8, 2018 - link

    Can the chiplet approach be implemented in ARM designs?
  • Wilco1 - Thursday, November 8, 2018 - link

    Splitting the SoC into smaller parts does not make sense since it is less than 100mm^2 - it is already a chiplet. Note a phone SoC already combines multiple dies made using different processes: DRAM and flash dies are stacked vertically in the same package.
  • ZolaIII - Sunday, November 11, 2018 - link

    Sure it can & much, much more.
  • TechDeal - Saturday, November 10, 2018 - link

    The size is a bit disappointing. I really hope single core performance improves as much as expected.
  • malisajason - Monday, November 26, 2018 - link

    This article is informative.

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